On The Design of A Dynamically Reconfigurable Function-Unit for Error Detection And Correction





Faculty/Professorship: Information Systems and Energy Efficient Systems  
Author(s): Pionteck, Thilo; Stiefmeier, Thomas; Staake, Thorsten ; Glesner, Manfred
Title of the Journal: Vlsi-Soc : From Systems To Silicon ; Proceedings of IFIP TC10, WG 10.5 Thirteenth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC2005), October 17-19, 2005, Perth, Australia
ISSN: 1868-4238
Corporate Body: VLSI-SOC 13, 2005, Perth, Western Australia
Publisher Information: New York : Springer
Year of publication: 2007
Pages: 283-297
Series ; Volume: IFIP International Federation for Information Proc ; 240
Language(s): English
DOI: 10.1007/978-0-387-73661-7_18
URL: http://link.springer.com/chapter/10.1007%2F978-...
Abstract: 
This paper presents the design of a function-specific dynamically reconfigurable architecture for error detection and error correction. The function-unit is integrated in a pipelined 32 bit RISC processor and provides full hardware support for encoding and decoding of Reed- Solomon Codes with different code lengths as well as error detection methods like bit-parallel Cyclic Redundancy Check codes computation. The architecture is designed and optimized for the usage in the medium access control layer of mobile wireless communication systems and provides simultaneously hardware support for control-flow and data-flow oriented tasks.
Type: Article
URI: https://fis.uni-bamberg.de/handle/uniba/3193
Year of publication: 22. April 2014